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rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?2004 analog devices, inc. all rights reserved. AD7783 read-only, pin configured 24-bit - adc with excitation current sources features single-channel, 24-bit - adc pin configurable (no programmable registers) isource select pin programmable input ranges ( 2.56 v or 160 mv) fixed 19.79 hz update rate simultaneous 50 hz and 60 hz rejection 24-bit no missing codes 18.5-bit p-p resolution ( 2.56 v range) 16.5-bit p-p resolution ( 160 mv range) interface master or slave mode of operation slave mode 3-wire serial spi , qspi, microwire, and dsp-compatible schmitt trigger on sclk power specified for single 3 v and 5 v operation normal: 1.3 ma @ 3 v power-down: 9 a on-chip functions rail-to-rail input buffer and pga applications sensor measurement industrial process control temperature measurement pressure measurement weigh scales portable instrumentation general description the AD7783 is a complete analog front end for low frequency measurement applications. the 24-bit sigma-delta adc con- tains one fully differential input channel that can be configured with a gain of 1 or 16 allowing full-scale input signal ranges of 2.56 v or 160 mv from a +2.5 v differential reference input. it also contains two 200 m a integrated current sources. the AD7783 has an extremely simple, read-only digital inter- face that can be operated in master mode or slave mode. there are no on-chip registers to be programmed. the input signal range and current source selection are configured using two external pins. functional block diagram oscillator and pll dout/ rdy sclk mode xtal1 xtal2 serial interface and control logic cs refin(? refin(+) 24-bit - adc range AD7783 v dd gnd buf pga mux ain(+) ain(? iout1 v dd iexc1 200 a iexc2 200 a iout2 ipin basic connection diagram AD7783 refin(+) refin(? ain(? ain(+) iout2 iout1 xtal1 v dd dout/ rdy cs sclk xtal2 gnd reference input current sources analog input power supply 32.768khz crystal digital interface the device operates from a 32.768 khz crystal with an on-chip pll generating the required internal operating frequency. the output data rate from the part is fixed via the master clock at 19.79 hz and provides simultaneous 50 hz and 60 hz rejection at this update rate. at this update rate, 18-bit p-p resolution can be obtained. the part operates from a single 3 v or 5 v supply. when oper- ating from 3 v supplies, the power dissipation for the part is 3.9 mw. the AD7783 is available in a 16-lead tssop. another part in the ad778x family is the ad7782. it is similar to the AD7783 except it has no integrated current sources and two differential input channels.
rev. b e2e AD7783especifications 1 (v dd = 2.7 v to 3.6 v or 4.75 v to 5.25 v, refin(+) = 2.5 v; refin(e) = gnd; gnd = 0 v; xtal1/xtal2 = 32.768 khz crystal; all specifications t min to t max , unless otherwise noted.) parameter AD7783b unit test conditions adc channel specification output update rate 19.79 hz nom adc channel no missing codes 2 24 bits min resolution 16 bits p-p 160 mv range, range = 0 18 bits p-p 2.56 v range, range = 1 output noise see table i integral nonlinearity 10 ppm of fsr max typically 2 ppm, offset error 3 m v typ ain(+) = ain( C C C C C C C fsr refin gain = 21 024 .
rev. b AD7783 e3e parameter AD7783b unit test conditions logic inputs all inputs except sclk and xtal1 2 v inl , input low voltage 0.8 v max v dd = 5 v 0.4 v max v dd = 3 v v inh , input high voltage 2.0 v min v dd = 3 v or 5 v sclk only (schmitt-triggered input) 2 v t(+) 1.4/2 v min/v max v dd = 5 v v t( C C C C C C C C C C C cs dd dd s C
rev. b e4e AD7783 limit at t min , t max parameter (b version) unit conditions/comments t 1 30.5176 m s typ crystal oscillator period t adc 50.54 ms typ 19.79 hz update rate t 2 0 ns min cs d dd dd dc cs scdd dd dd r cs cs rsc scd s sc sc sc sc dsc s s r dd s scsc crcrscs dd dd d dd s dd dd src dd dd cc
rev. b AD7783 e5e absolute maximum ratings * (t a = 25 C C C C C C C ja thermal impedance . . . . . . . . . . . . . . . . . . . . 97.9 jc thermal impedance . . . . . . . . . . . . . . . . . . . . . . 14 C C C
rev. b e6e AD7783 pin configuration top view (not to scale) xtal1 AD7783 refin(+) refin(e) ain(+) ain(e) iout1 iout2 ipin xtal2 v dd gnd mode dout/ rdy cs sclk range 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 pin function descriptions pin no. mnemonic function 1 xtal1 input to the 32.768 khz crystal oscillator inverter. 2 refin(+) positive reference input. refin(+) can lie anywhere between v dd and gnd + 1 v. the nominal refer- ence voltage (refin(+) C C C C C C C C cs cs cs d cs d cs dscd d rdy sddrd rdy d rdy d rdy d rdy d rdy scscsc d rdy dsc d ddd dd d rd dd s c
rev. b t ypical performance characteristics?d7783 ? 8 7 0 8388039 8388721 8388687 8388657 8388615 8388579 8388547 8388499 8388449 8388382 8388754 8389110 8389033 8388985 8388941 8388906 8388874 8388841 8388805 8388779 6 5 4 3 2 1 9 tpc 1. noise distribution histogram adc circuit information overview the AD7783 incorporates a s - d adc channel, on-chip pro- grammable gain amplifier, and on-chip digital filtering intended for the measurement of wide dynamic range, low frequency signals such as those in weigh-scale, strain gage, pressure trans- ducer, or temperature measurement applications. this adc input is buffered and can be programmed to have an input voltage range of 160 mv or 2.56 v. the input channel is configured as a fully differential input. buffering the input channel means that the part can accommodate significant source impedances on the analog input and that r, c filtering (for noise rejection or rfi reduction) can be placed on the analog input if required. the device requires an external reference of 2.5 v nominal. figure 3 shows the basic connections required to operate the part. AD7783 refin(+) refin(? ain(? ain(+) iout2 iout1 xtal1 xtal2 v dd dout/ rdy cs sclk gnd power supply 10 f 0.1 f controller 32.768khz crystal 6k 10k in out+ out in+ figure 3. basic connection diagram the output rate of the AD7783 ( f adc ) equals f adc = () 32 768 10 69 8 3 3 ./ while the settling time equals t f t settle adc adc = ? ? ? = 2 2 n ormal-mode rejection is the m ajor function of the digital filter on the AD7783. simultaneous 50 hz and 60 hz rejection of better than 60 db is achieved as notches are placed at both 50 hz and 60 hz. figure 4 shows the filter rejection. frequency (hz) 0 010 40 6 080 100 a ttenuation (db) ?0 ?0 ?20 ?40 ?60 ?0 ?0 ?00 20 30 50 70 90 output data rate = 19.8hz input bandwidth = 4.74hz 50hz rejection = ?6db, 50hz 1hz rejection = ?0db 60hz rejection = ?17db, 60hz 1hz rejection = ?4db figure 4. filter profile (filter notches at both 50 hz and 60 hz) 2.5 0 1.0 3.0 2.5 2.0 1.5 3.5 5.0 4.5 4.0 2.0 1.5 1.0 0.5 3.0 v ref (v) rms noise ( v) 160mv range 2.56v range v dd = 5v v ref = 2.5v t a = 25 c tpc 2. rms noise vs. reference input
rev. b e8e AD7783 noise performance table i shows the output rms noise and output peak-to-peak resolution in bits (rounded to the nearest 0.5 lsb) for the two input voltage ranges. the numbers are typical and are generated at a differential input voltage of 0 v. the peak-to-peak reso- lution figures represent the resolution for which there will be no code flicker within a six-sigma limit. the output noise comes from two sources. the first is the electrical noise in the semi- conductor devices (device noise) used in the implementation of the modulator. secondly, when the analog input is converted into the digital domain, quantization noise is added. the device noise is at a low level and is independent of frequency. the quantization noise starts at an even lower level but rises rapidly with increasing frequency to become the dominant noise source. table i. typical output rms noise and peak-to-peak resolution vs. input range input range 160 mv 2.56 v noise ( m v) 0.65 2.30 peak-to-peak resolution (bits) 16.5 18.5 digital interface the AD7783 cs scd rdy dd scsc d scd rdy rdy d rdy d not to read from the device to ensure that a data read is not at tempted while the register is being updated. the digital conversion is also output on this pin. cs cs d cs cs d d sc d cs srdd scd cs sc d rdy dd rdy sc sc sc d rdy rdy cs scd rdy cs sdd scsc cs d rdy sc d dsc sc crcdscr c dc dc rd dc d dd C
rev. b AD7783 e9e to the voltage on the ain( C C code ain gain v n ref = () () + [] - 21 024 1 1 /. wh ere ain is the analog input voltage, gain is the pga gain, i.e., 1 on the 2.56 v range and 16 on the 160 mv range, and n = 24. excitation currents the AD7783 also contains two matched 200 m a constant cur- rent sources. both source current from v dd that is directed to either the iout1 or iout2 pins of the device depending on the polarity of the ipin pin. these current sources can be used to excite external resistive bridge or rtd sensors. crystal oscillator the AD7783 is intended for use with a 32.768 khz watch crys- tal. a pll internally locks onto a multiple of this frequency to provide a stable 4.194304 mhz clock for the adc. the modu- lator sample rate is the same as the crystal oscillator frequency. the start-up time associated with 32.768 khz crystals is typically 300 ms. in some cases, it will be necessary to connect capacitors on the crystal to ensure that it does not oscillate at overtones of its fundamental operating frequency. the values of capacitors will vary depending on the manufacturer C C
rev. b e10e AD7783 outline dimensions 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards ms-153ab
rev. b AD7783 e11e revision history location page 8/04?data sheet changed from rev. a to rev. b. change to features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4/03?data sheet changed from rev. 0 to rev. a. change to specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
c02702e0e8/04(b) e12e

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